Method of producing a semiconductor device having trench capacit

Details Method of producing a semiconductor device having trench capacit Method of producing a semiconductor device having trench capacit

1992-08-06

1994-05-31

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 40, 437 48, 437 60, 437919, H01L 2170, H01L 2700

Patent

active

053169620

ABSTRACT:
A semiconductor memory device is provided which includes a semiconductor substrate of a first conductivity type, a plurality of trench capacitors formed in the substrate and a plurality of switching transistors formed on the respective trench capacitors. Each of the switching transistors is electrically connected to the corresponding trench capacitor. Each of the trench capacitors has a first electrode formed in the side portion of a trench provided in the substrate and a second electrode containing impurities of the first conductivity type and embedded in the trench. Each of the switching transistors has a source region formed from a first epitaxial layer of the first conductivity type grown on the trench so as to electrically contact the second electrode, a channel region formed from a second epitaxial layer of a second conductivity type grown on the first epitaxial layer, and a drain region formed from a third epitaxial layer of the first conductivity type grown on the second epitaxial layer. The first, second and third epitaxial layers are in contact with a polycrystalline silicon layer containing impurities of the second conductivity type. The first conductivity type is opposite to the second conductivity type.

REFERENCES:
patent: 4649625 (1987-03-01), Lu
patent: 4728623 (1988-03-01), Lu et al.
patent: 5182224 (1993-01-01), Kim et al.
"Buried Storage Electrode (BSE) Cell for Megabit DRAMS" by M. Sakamoto et al. 29.5 1985 IEEE pp. 710-713.

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