Timing apparatus for PCM/TDM switching networks

Details Timing apparatus for PCM/TDM switching networks Timing apparatus for PCM/TDM switching networks

1975-04-21

1976-07-27

Brown, Thomas W.

H04Q 1100

Patent

active

039718921

ABSTRACT:
A timing circuit for use in pulse code modulation, time division multiplex switching networks is described. The switching networks are a part of a time division multiplex telecommunication system wherein each call uses the same time slot on the incoming and outgoing lines. The timing circuit has a number of word-organized storage locations equal to the number of PCM words per pulse frame and an equal number of address memory locations individually assigned to the aforementioned storage locations. The word-organized storage locations are found by blocks of shift registers connected in series. Each block in the series is connected over the non-operating positions or rest positions of pairs of simultaneously actuated switches to the next succeeding block. In their operating positions the switches connect the shift registers to the conductors of a service trunk system. The address memory locations are formed from a second series-connected shift register group connected to form a ring. Bit comparators compare the contents of the second shift register stages to a timing circuit carrying the time position code identifying the time slot in question. When all the bits of the time position code are equal to corresponding bits of the time slot address, the control inputs of the pair of aforementioned switches located at the output of the allocated word-organized storage are actuated, changing these switches to their operating positions.

REFERENCES:
patent: 3715505 (1973-02-01), Gordon et al.
patent: 3761894 (1973-09-01), Pilc et al.
patent: 3903370 (1975-09-01), Carbrey et al.

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