Etching thin film circuits and semiconductor chips

Details Etching thin film circuits and semiconductor chips Etching thin film circuits and semiconductor chips

1975-04-14

1976-07-27

Drummond, Douglas J.

Adhesive bonding and miscellaneous chemical manufacture

Methods

Surface bonding and/or assembly therefor

156 17, 252 791, C09K 1300

Patent

active

039716848

ABSTRACT:
A method is provided for etching thin film circuits or semiconductor chips to produce well defined vertically etched walls at rapid etching rates. The substrates to be etched are covered by masks and positioned on a cathode electrode enclosed in a container. Also enclosed in the container is a chemically-reactive gas used as an etchant. According to the method the cathode is negative-biased to ionize the reactive gas and attract the chemically reactive ions toward the cathode. These reactive ions impinge on the substrates in a predominantly vertical direction to produce well defined vertically etched walls.

REFERENCES:
patent: 3546036 (1970-12-01), Manaseuit
patent: 3661747 (1972-05-01), Byrnes, Jr. et al.
patent: 3664942 (1972-05-01), Havas et al.
patent: 3795557 (1974-03-01), Jacob
patent: 3816198 (1974-06-01), La Combe et al.
patent: 3880684 (1975-04-01), Abe
patent: 3935328 (1976-01-01), Sugano et al.

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