Fishing – trapping – and vermin destroying
Patent
1989-04-03
1991-04-23
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 38, 437 40, 437203, 437228, H01L 21265
Patent
active
050100254
ABSTRACT:
A method and construction are disclosed to form a trench gate JFET transistor. The invention comprises forming a first trench in a semiconductor substrate, forming a gate channel about the trench and forming a conductive layer upon the surface of the gate channel. The conductive layer interfaces with the gate channel to form a p-n junction. Source and drain regions are formed adjacent to a trench and disposed in electrical contact with the gate channel. An integral capacitor may be added to the construction by forming a second trench, which extends through and excavates a portion of the first trench. The drain region is extended about the surface of the second trench to remain in electrical contact with the gate channel. A layer of insulating material is applied to the second trench, which is then filled with a body of conductive material. The conductive material is insulated from the conductive layer by the insulating layer.
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Grumman Aerospace Corporation
Hearn Brian E.
Thomas Tom
LandOfFree
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