Analog comparator

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307491, 307494, H03K 524

Patent

active

049029134

ABSTRACT:
A novel analog comparator having cascaded gain stages powered by two buses, the voltages on which are dependent on a reference input voltage. A network, responsive to the reference input voltage, sets the voltages on the buses and isolates the buses from external power and ground to achieve high power supply and ground noise immunity. An alternative design of the network is provided which removes errors in the accuracy of the comparator resulting from differing drain-to-source voltages across the various transistors. The accuracy of the comparator is then dependent on the accuracy of matching predetermined ratios of the sizes of the transistors.

REFERENCES:
patent: 4074150 (1978-02-01), Buckley III et al.
patent: 4521696 (1985-06-01), Raghunathan
patent: 4542303 (1985-09-01), Jarrett et al.
patent: 4791318 (1988-12-01), Lewis et al.
"Bipolar and MOS Analog Integrated Circuit Design", Alan B. Grebene, Micro-Linear Corporation, Sunnyvale, Calif., published by John Wiley & Sons, Integrated-Circuit Oscillators and Timers, p. 584.

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