Process for the fabrication of a nonvolatile memory cell with ve

Details Process for the fabrication of a nonvolatile memory cell with ve Process for the fabrication of a nonvolatile memory cell with ve

1985-08-12

1986-11-18

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29576W, 29578, 148 15, 357 235, H01L 2978

Patent

active

046227377

ABSTRACT:
On the doped area of a monocrystalline silicon substrate is grown a thick oxide layer a side portion of which is subjected to etching and underetching within a predetermined area until it uncovers an edge of silicon on which is then grown thin oxide; polycrystalline silicon layers separated by an oxide layer are then deposited to produce a nonvolatile memory cell in which the floating gate consisting of one of said polycrystalline silicon layers is separated from the underlying doped area of the substrate, which constitutes the drain, by a very small thin oxide area which adjoins an extended area of thick oxide. The electrical capacitance between the floating gate and the drain is thus reduced with resulting smaller dimensions of the cell for given performance.

REFERENCES:
patent: 4203158 (1980-05-01), Frohman-Beulchkowsky et al.

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