Method and apparatus for removably connecting either asynchronou

Details Method and apparatus for removably connecting either asynchronou Method and apparatus for removably connecting either asynchronou

1994-12-19

1997-02-18

Harvey, Jack B.

395442, G06F 1300, G06F 1200

Patent

active

056048750

ABSTRACT:
A cache SRAM connector assembly comprising a connector, a number of latches, and a number of high performance switches, is provided to a computer system. The connector removably connects either asynchronous or burst cache SRAM to a processor bus. The latches store cache access addresses being driven on a number of address lines of the processor bus. The high performance switches being coupled to both the latches and the address lines of the processor bus selectively provide the cache SRAM with latched access addresses as required by asynchronous cache SRAM or directly driven access addresses on the processor bus as required by burst cache SRAM.

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patent: 5357624 (1994-10-01), Lavan

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