Fishing – trapping – and vermin destroying
Patent
1995-06-06
1997-02-18
Tsai, Jey
Fishing, trapping, and vermin destroying
437 60, 437919, H01L 2170, H01L 2700
Patent
active
056041454
ABSTRACT:
Transfer gate transistors are formed on a main surface of a semiconductor substrate. The transfer gate transistors have impurity regions for serving as source/drain regions. A first interlayer insulating film having a substantially flat upper surface is formed to cover the transfer gate transistors. The first interlayer insulating film is provided with contact holes reaching the impurity regions. Plugs are formed in the contact holes. Capacitors are only formed on the flat upper surface of the first interlayer insulating film. Lower electrodes of the capacitors and the plugs are electrically connected with each other through barrier layers. Thus, it is possible to improve capacitances of capacitors in a DRAM.
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Kayama et al. IDEM 91, "A Stacked Capacitor with (.sup.Ba.sub.x.sup.Sr.sub.1-x).sup.TiO.sub.3 for 256M DRAM", pp. 823-826.
Hashizume Yasushi
Shinkawata Hiroki
Mitsubishi Denki & Kabushiki Kaisha
Tsai Jey
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