Semiconductor memory device having error detection and correctio

Details Semiconductor memory device having error detection and correctio Semiconductor memory device having error detection and correctio

1998-04-14

2000-05-02

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

365241, 36523003, 365200, G11C 1604

Patent

active

06058047&

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a semiconductor memory device including a semiconductor memory in which a memory area thereof is divided into a plurality of blocks, the number of times data can be written to each block being limited, and a memory controller for detecting an error in data read out from each block, and correcting the data in the case where correctable error is detected and a method for reading data from and writing data in the semiconductor memory device.


BACKGROUND ART

There has been a trial in which a semiconductor hard disk is used in place of a mechanical hard disk. The mechanical hard disk is advantageous in terms of cost and capacity, whereas the semiconductor hard disk is superior in terms of speed, power consumption, impact resistance, resistance to vibration, weight, size and noise. There have been studies of using a DRAM or SRAM as a semiconductor hard disk; however, more recently, the flash memory (EEPROM: Electrically Erasable Programmable ROM) is becoming more popular. This is because the flash memory entails some advantages, namely, it does not require a battery backup, the element structure thereof is simple, thus making it possible to increase the degree of integration, and the flash memory can be mass-produced at low cost.
The flash memory is a batch erasable and electrically rewritable element; therefore data cannot be over-written thereon, and data cannot be written in a block unless previously-written data are erased therefrom. For example, the writing is performed by 264 to 528 bytes per unit, whereas the erasing is performed by 528 bytes to 64 k bytes per unit. Further, in connection with the flash memory, the number of rewrite operations (the number of erase and write operations) for each block is limited. Therefore, a backup memory area is prepared in addition to the main memory area, and when the life of a block in the main memory area is over (that is, posterior defective), the re-use of the block is inhibited, and a backup block in the backup memory area is used in place of the block.
Each block includes a data region in which data is written and a redundant region in which information indicating the quality of the block, and administrative information such as ECC (error correcting code), used for detecting and correcting an error occurred in data, are written. The ECC is used for such a purpose that a 1-bit error is detected and the error bit is corrected, and 2-bit error is only detected. The block in which a 2-bit error has occurred, is designated as a defective block, and the re-use thereof is inhibited. Then, a backup block is used for substitution.
In a case of whether or not a write of data into the flash memory has been successful, is checked, data in the data bus is rewritten in a backup block even when a 2-bit error has been occurred. However, in the case where the host computer reads data in the flash memory, such a bit error which cannot be corrected disables the read out of data, causing the loss of the data. Therefore, such an error is fatal to the semiconductor disk. In order to avoid this, it is necessary, before an error which cannot be corrected occurs in a block, to inhibit the re-use of the block and carry out the substitution process.
According to a conventional method, the number of data writing times is stored in the redundant region of a block, and when the number reaches a preset value, the block is handled as a defective block.
Although the allowable number of data writing times into block may differ from one IC maker to another, it should be about 100,000 times to 1,000,000 times, and therefore a memory of 3 bytes is required so as to have the count value of data writing times in the redundant region. The redundant region contains the ECC of data and code indicating the quality of the block, which occupy the most of the region, and therefore an extra 3-byte memory is a very serious loss of the region for the redundant region which is very precious. It may even cause an increase in cost. Further, each time data is writ

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Toshiba Nand E.sup.2 PROM, TC5816FT-1, 9 pages, May 9, 1994.

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