Patent
1988-07-14
1990-08-28
Larkins, William D.
357 233, 357 59, H01L 2978
Patent
active
049529935
ABSTRACT:
A semiconductor device comprising three recessed portions formed at a very small pitch on the surface of a semiconductor substrate, remaining regions formed between these recessed portions as impurity diffused regions serving as the source and the drain, respectively, and a conductive region as a gate electrode formed through an insulating film within the central recessed portion, and a method of manufacturing such a semiconductor device are disclosed. With this device, its gate length can be made shorter than that in the prior art and the junction leakage is reduced, resulting in miniaturization and an improvement in the characteristics.
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Kabushiki Kaisha Toshiba
Larkins William D.
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