Multiplex communications – Wide area network – Packet switching
Patent
1989-03-15
1989-10-24
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
3701051, H04J 306
Patent
active
048766836
ABSTRACT:
A repeater which receives a frame-multiplexed signal, extracts a receiving clock from the signal, and detects a timing of frame synchronization. The receiving clock and a master clock are input into a selector, the output of the selector is supplied for frame regeneration through a clock phase gradual shift circuit, and the detected timing is supplied for frame synchronization in the regenerated frame-multiplexed signal through a gate. Normally, the receiving clock and the detected timing is supplied for the frame regeneration, however, when the detection of the timing of frame synchronization fails, the output of the selector is switched to the master clock and the gate becomes off, and when the detection of the timing of frame synchronization is recovered and the detected timing of frame synchronization and a timing of frame synchronization is regeneration, which is generated from the master clock, coincide, the output of the selector is switched back to the receiving clock and the gate simultaneously becomes on. Further, in the clock phase gradual shift circuit, normally, an output clock synchronizes with an input clock, and a phase shift resulting from an abrupt phase shift occurring in the input clock gradually appears in an output clock after the abrupt phase shift in the input clock.
REFERENCES:
patent: 3962635 (1976-06-01), Roza
patent: 3986053 (1976-10-01), Doemer
English abstract of Japanese Application No. JPA52-150952.
Fujitsu Limited
Olms Douglas W.
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