Fishing – trapping – and vermin destroying
Patent
1988-08-23
1989-10-24
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 47, 437 52, 437918, 437191, 437193, H01L 21425, H01L 2138
Patent
active
048762156
ABSTRACT:
Disclosed is a (4T-2R) SRAM cell and method which achieves a much reduced cell area through the combined use of vertical trench pull-down n-channel transistors and a buried-layer ground plate. The reduced cell area allows the fabrication of a higher density SRAM for a given set of lithographic rules. The cell structure also allows the implementation of a (6T) SRAM cell with non-self-aligned polysilicon p-channel pull-up transistors without appreciably enlarging the cell area.
REFERENCES:
patent: 4105475 (1978-08-01), Jenne
patent: 4194283 (1980-03-01), Hoffmann
patent: 4326332 (1982-04-01), Kenney
patent: 4453175 (1984-06-01), Ariizumi et al.
patent: 4455740 (1984-06-01), Iwai
patent: 4481524 (1984-11-01), Isujicle
patent: 4609835 (1986-09-01), Sakai et al.
patent: 4797717 (1989-01-01), Isibashi et al.
Rodgers, "Umos Memory Technology", IEEE J. of Solid-State Circuits, SC-12, No. 5, Oct. 77, pp. 515-523.
Amir, "U-MOS Packs 16 Kilobits Into Static Random-Access Memory", Electronics, May 24, 1979, pp. 137-141.
Schuster, "Single U-Groove High Density Static Random-Access Memory Cell", IBM TDB, vol. 22, No. 3, Aug. 1979, pp. 1282-1283.
Hearn Brian E.
Integrated Device Technology Inc.
Schatzel Thomas E.
Thomas Tom
LandOfFree
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