High speed sampling apparatus and method for calibrating the sam

Coded data generation or conversion – Sample and hold

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341120, H03M 110

Patent

active

054883695

ABSTRACT:
A high speed sampling apparatus based on multiplexed charged coupled devices or sample and hold devices (18) utilises a microprocessor (20) to monitor timing differences between clock signals, each used to clock a respective one of the devices and a reference signal to control a variable timing delay (12, 13, 14) whereby to calibrate each of the devices (18). The control of the variable timing delay (12, 13, 14) is achieved by a digital/analogue converter (15) and additionally, a mark to space ratio control of the variable timing delay is also provided using a digital/analogue converter (16).

REFERENCES:
patent: 4053926 (1977-10-01), Lemoine et al.
patent: 4353057 (1982-10-01), Bernet et al.
patent: 4763105 (1988-08-01), Jenq
patent: 4768017 (1988-08-01), Gordon
patent: 4833445 (1989-05-01), Buchele

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