Semiconductor memory device having read/write operation improved

Details Semiconductor memory device having read/write operation improved Semiconductor memory device having read/write operation improved

1991-12-30

1994-03-08

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

36518901, 36518905, 36523006, G11C 800

Patent

active

052933474

ABSTRACT:
A semiconductor memory device according to the present invention is a dynamic type semiconductor memory device carrying out pipe line processing in page mode, including two column decoders, two address latches, two preamplifiers and two write drivers for one memory cell array. A column address supplied from an address buffer is provided sequentially and alternately to each of the address latches, whereby one of the column decoders, one of the preamplifiers and so on corresponding to the address latch operate alternately.

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"Innovative Chip Designs Lead to Dense, Superfast RAMs", Dave Bursky, Electronic Design, Aug. 18, 1983, pp. 97-110 and 104-112 (even).

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