Method of making sub-micron dimensioned NPN lateral transistor

Details Method of making sub-micron dimensioned NPN lateral transistor Method of making sub-micron dimensioned NPN lateral transistor

Filed on

1980-12-29

Date issued

1983-11-15

Examiner

Roy, Upendra

Patent Class

Metal treatment

SubClass

Compositions

SubSubClass

Heat treating

Other Related Categories

29576B, 29578, 148175, 148187, 357 34, 357 91, H01L 2122, H01L 2131

Type

Patent

Status

active

Patent number

044153716

Description

ABSTRACT:
An array of hundreds of devices may be simultaneously processed on a chip to sub-micron dimensions by establishing tiny active regions for each transistor surrounded by field oxide filled motes or slotted regions, wherein the slots are utilized to dope the substrate within the action region. The N type substrate is double energy boron planted through one surface to establish a P region to a given depth. This surface is oxidized and photoresist masked conventionally to open regions for the slots which are ion milled or ODE etched to a given depth. N+ regions are established by the slots by ion implanting at an angle such that the entire depth of the slot is not doped but rather the doping is confined to a region within the double energy P implanted depth. Drive-in diffusion enlarges the N+ areas for the emitter and collecter and oxidation fills the mote insulating regions around the active area.
The oxide is stripped and the P region enhanced to P+ at the surface, with silox being deposited and opened for metal contacts to the P+ region for the base and the emitter and collector regions. The doping profile of the base region provides a potential barrier to minimize the flow of electrons toward the surface because the emitter electrons are channeled through the less heavily doped part of the base region to the collector.

REFERENCES:
patent: 4047975 (1977-09-01), Widman
patent: 4140558 (1979-02-01), Murphy et al.
patent: 4211582 (1980-07-01), Horng et al.
patent: 4264382 (1981-04-01), Anantha et al.
patent: 4309812 (1982-01-01), Horng et al.
patent: 4318751 (1982-03-01), Horng
patent: 4339767 (1982-07-01), Horng et al.
Berndlmaier et al. IBM-TDB, 22 (1980) 4543.
Brack et al. IBM-TDB, 16 (1974) 3287.

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