High voltage level shift semiconductor device

Details High voltage level shift semiconductor device High voltage level shift semiconductor device

1987-12-16

1989-12-26

Larkins, William D.

357 234, 357 42, 357 51, H01L 2704, H01L 2978

Patent

active

048901466

ABSTRACT:
Disclosed is a semiconductor device implementing a resistor-load level shift circuit which avoids high voltage crossings of PN junctions by utilization of a combined drain resistor region and a unique circuit layout.

REFERENCES:
patent: 4172260 (1979-10-01), Okabe et al.
patent: 4292642 (1981-09-01), Appels et al.
patent: 4300150 (1981-11-01), Colak
patent: 4766474 (1988-08-01), Nakagawa et al.
Paper entitled "Power Integrated Circuits-A Brief Overview", B. Jayant Baliga, IEEE Transactions on Electron Devices, vol. ED-33, No. 12, Dec. 1986, pp. 1936-1939.
Paper entitled "Avalanche Breakdown in High-Voltage D-MOS Devices", by Michel J. Declercg et al., IEEE Transactions on Electron Devices, vol. ED-23, No. 1, Jan. 1986, pp. 1-4.
Article entitled "Modeling of the On-Resistance of LDMOS, VDMOS, and VMOS Power Transistors", by S. C. Sun et al., IEEE Transactions on Electron Devices, vol. ED-27, No. 2, Feb. 1980, pp. 356-367.
Article entitled "Modeling and Process Implementation of Implanted Resurf Type Devices", by E. J. Wildi et al., 1982 International Electron Device Meeting, paper 10.7, pp. 268-271.
Paper entitled "Effects of Drift Region Parameters on the Static Properties of Power LDMOST", by Sel Colak, IEEE Transactions on Electron Devices, vol. ED-29, No. 12, Dec. 1981, pp. 1455-1466.
Paper entitled "High Voltage Thin Layer Devices (RESURF Devices)", by J. A. Appels et al., International Electron Device Meeting Technical Digest, Dec. 1979, paper 10.1, pp. 238-241.

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