Picture processing apparatus including a dual port memory

Details Picture processing apparatus including a dual port memory Picture processing apparatus including a dual port memory

1987-09-01

1989-12-26

Moore, David K.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340798, 340703, G09G 100

Patent

active

048901008

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

This invention relates a picture processing apparatus in which a frame memory of a CRT display unit can be painted by any painting data such as luminance information and color discrimination information.


BACKGROUND ART

In order to paint a frame buffer of a picture display unit uniformly with any data such as luminance data and color data, prescribed picture processing is required. Conventionally, in control for such picture processing, a single-access port or double-access port is used in order to connect the frame memory with a processor for control.
If a single-port memory is used as a frame buffer, the operation for painting the frame buffer, namely the writing of data into the frame buffer, is performed from a single random port. If a dual-port memory is used as a frame buffer, a serial-access port is used to read data out of the memory cell array. However, when a data register for serial access of a dual port memory is equipped only with a data output function, the writing of input data, such as paint information, into the memory cell array is carried out from a random port.
In a case where the single-port memory is used as the frame buffer, or in a case where the data register possesses solely an output function even if the dual-port memory is used as the frame buffer, the paint information from a processor must be written through a random port each time for every pixel when the frame buffer is painted with the predetermined information. Let T represent the time needed to write paint information in one specific row and column of the frame memory. In order to write paint information into an entire frame buffer composed of, e.g., 256.times.256 pixels, the processor must access the frame buffer 256.times.256 times, so that a time equivalent to 256.times.256 .times.T is required in order to write all the paint information. As a result, painting is very slow and the processor is subjected to a very heavy burden required for paint.
The present invention seeks to eliminate the foregoing problems of the conventional picture processing apparatus and its object is to provide a picture processing apparatus in which the burden on the processor can be lightened and paint information can be stored in the frame buffer at high speed.


SUMMARY OF THE INVENTION

The present invention provides a picture processing apparatus having a picture memory comprising a dual-port memory connected to a processor via a serial port and random port, including a memory cell array which is randomly accessed by the processor via the random port and in which predetermined pixel information is stored, a data register, which has a serial input function, accessed via the serial port and adapted to transfer predetermined paint information to the memory cell array, and storage means accessed by the processor for storing paint information transferred to the data register.
In the present invention, the dual-port memory is used as the frame buffer, paint information stored in the storage means is transferred serially to the data register of the dual-port memory, the paint information supplied to the data register is transferred internally to the memory cell array of the dual-port memory one row at a time, and the paint information is written into the frame buffer at high speed.


BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram, of a first embodiment of a picture processing apparatus according to the invention;
FIG. 2 is a block diagram of the system configuration of the dual-port memory in FIG. 1;
FIG. 3 is a timing diagram of picture processing for FIG. 1; and
FIG. 4 is a block diagram of a second embodiment of a picture processing apparatus according to the invention.


DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the invention will now be described in detail with reference to the drawings.
FIG. 1 is a block diagram of a first embodiment of a picture processing apparatus according to the invention, and FIG. 2 is a block diagram of the system configuration of a dual-port memory in FIG. 1.
In FIG. 1

REFERENCES:
patent: 4562435 (1985-12-01), McDonough et al.
patent: 4646078 (1987-02-01), Knierim et al.
patent: 4731742 (1988-03-01), Nishi et al.

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