Patent
1983-04-07
1986-05-06
James, Andrew J.
357 68, H01L 21283, H01L 2318, H01L 2194
Patent
active
045875499
ABSTRACT:
A multilayer interconnection structure for a semiconductor device has interconnection layers superposed on each other on the surface of a semiconductor substrate with an insulating layer interposed therebetween. Connection between the desired interconnection layers or between the desired interconnection layer and semiconductor substrate is effected by means of a contact hole formed in the respective insulating layers. Two upper and lower interconnection layers intersect each other above the contact holes, and the contact hole does not overlap part of the traverse region of the upper interconnection layer in the intersecting section.
REFERENCES:
patent: 3436611 (1969-04-01), Perry
patent: 3436616 (1969-04-01), Jarrad
patent: 4115795 (1978-09-01), Masuoka et al.
patent: 4185294 (1980-01-01), Sumitomo et al.
patent: 4348746 (1982-09-01), Okabayashi et al.
patent: 4412239 (1983-10-01), Iwasaki et al.
patent: 4419682 (1983-12-01), Masuoka
Clark S. V.
James Andrew J.
Tokyo Shibaura Denki Kabushiki Kaisha
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