Bus oriented LIFO/FIFO memory

Details Bus oriented LIFO/FIFO memory Bus oriented LIFO/FIFO memory

1983-08-31

1986-05-27

Moffitt, James W.

Static information storage and retrieval

Plural shift register memory devices

365189, G11C 1928, G11C 700

Patent

active

045920192

ABSTRACT:
There is disclosed a modular memory cell structure including a data latch, an occupancy bit latch and control logic. Each memory cell has access to the occupancy bit status of adjacent cells and to the input, output, control, and status busses. The occupancy status provides positional address information enabling each cell to determine if data in its data latch is the first, intermediate, or last element of a data queue. When a group of memory cells and an initialization circuit are interconnected, a modular integrated circuit design results which can function as either a first in-first out (FIFO) or a last in-first out (LIFO) memory.

REFERENCES:
patent: 4151609 (1979-04-01), Moss
patent: 4156288 (1979-05-01), Spandorfer
patent: 4159532 (1979-06-01), Getson et al.
patent: 4163291 (1979-07-01), Suzuki et al.
patent: 4222102 (1980-09-01), Jansen et al.
patent: 4323790 (1982-04-01), Dunning et al.
patent: 4459681 (1984-07-01), Ohtsuka
Nordquist et al., "A Novel Rotate and Shift Circuit Using Bidirectional Gates", IEEE Transactions on Computers, vol. C-19, No. 9, Sep. 1970, pp. 802-808.

Affiliated with

Also associated with

Rating

Bus oriented LIFO/FIFO memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bus oriented LIFO/FIFO memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus oriented LIFO/FIFO memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1574946