Full adder using complementary MOSFETs

Details Full adder using complementary MOSFETs Full adder using complementary MOSFETs

1982-09-29

1986-05-27

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

045920079

ABSTRACT:
The invention provides a full adder having a logic circuit which has an inverter and a selector circuit, a logic circuit which has an inverter and a selector circuit, and a logic circuit which has a selector circuit and an inverter so as to produce a sum output signal S and a carry output signal C in response to three input signals X, Y and Z.

REFERENCES:
patent: 3602705 (1971-08-01), Cricchi et al.
patent: 3767906 (1973-10-01), Pryor
patent: 3843876 (1974-10-01), Fette et al.
patent: 4054788 (1977-10-01), Maitland et al.
patent: 4254471 (1981-03-01), Hunt
patent: 4463439 (1984-07-01), Weinberger
The 13th Conference on "Solid State Devices", The Japan Society of Applied Physics, Aug. 26-27, 1981, pp. 15-16.
Proceedings of the Conference on Solid State Devices, Tokyo, 1981, JJAP, vol. 21 (1982), Supplement 21-1 pp. 51-52.

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