Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Including reversible counter
Patent
1985-05-31
1987-05-19
Miller, Stanley D.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Including reversible counter
328162, 307449, 377 54, H03K 2300
Patent
active
046673385
ABSTRACT:
A noise elimination circuit for eliminating noise signals from data given by a binary form includes a modulo in up/down counter having a first input for receiving binary data, a second input for receiving clock pulses and output for producing a counted signal. The counter is effected to count up in response to the clock pulses when the binary data is a HIGH, and to count down in response to said clock pulses when the binary data is a LOW. A decoder is provided which has inputs for receiving the counted signal, a first output for producing an indication signal when the counted signal corresponds to a first predetermined number i, and a second output for producing an indication signal when the counted signal corresponds to a second predetermined number j, in which i is equal to or greater than zero, j is greater than i and n is equal to or greater than j. A flip-flop is provided which has a reset terminal connected to the first output of the decoder, a set terminal connected to the second output of the decoder and an output for producing a data with noise signals being eliminated.
REFERENCES:
patent: 3894185 (1975-07-01), Vieri
patent: 3912121 (1975-10-01), Steffen
patent: 4060242 (1977-11-01), Huang et al.
patent: 4278842 (1981-07-01), Simmons
Akiyama Toru
Higashitsutsumi Yoshihito
Toyonaga Kenji
Yanai Akihiro
Miller Stanley D.
Ohralik K.
Sanyo Electric Co,. Ltd.
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