Patent
1995-06-07
1997-07-22
Swann, Tod R.
395481, G06F 1206
Patent
active
056511280
ABSTRACT:
The integrated circuit memory has a matrix of cells and a plurality of circuits enabling the selective application, to the cells, of programming and erasure potentials. These circuits are controlled by an integrated state machine programmed to perform algorithms adapted to the operations to be performed. In order to facilitate the devising and perfecting of these algorithms, the memory includes selection means enabling an external tester to be substituted for the state machine. A particularly advantageous application is in "FLASH EEPROM" memories.
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Anderson Matthew
Chow Christopher S.
Formby Betty
Groover Robert
SGS-Thomson Microelectronics S.A.
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