Charge neutralizing system for circuits having charge injection

Details Charge neutralizing system for circuits having charge injection Charge neutralizing system for circuits having charge injection

1996-02-20

1997-07-22

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

With compensation

327404, 327437, G06G 712, H03K 17687

Patent

active

056507445

ABSTRACT:
The present invention relates to a system for neutralizing charge injection problems in a switched current system. The system is comprised of a PMOS transistor coupled in parallel with an NMOS switch transistor. If the channel area of the PMOS transistor and the NMOS transistor are equal, then the clock signal to the PMOS transistor must be adjusted to neutralize the negative channel charges of the NMOS transistor. However, if the clock signal to both the PMOS transistor and the NMOS transistor are equal, then the dimension of the PMOS transistor must be smaller than the NMOS transistor in order to neutralize the negative channel charges of the NMOS transistor.

REFERENCES:
patent: 4633222 (1986-12-01), Dingwall
patent: 5084634 (1992-01-01), Gorecki
patent: 5250852 (1993-10-01), Ovens et al.
patent: 5281870 (1994-01-01), Kobatake
patent: 5384496 (1995-01-01), Tanaka

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