Method of fabricating a resistor in an integrated circuit

Details Method of fabricating a resistor in an integrated circuit Method of fabricating a resistor in an integrated circuit

1997-01-24

1997-10-14

Tsai, Jey

Fishing, trapping, and vermin destroying

437193, 437918, 437203, H01L 2170, H01L 2700

Patent

active

056772289

ABSTRACT:
A method for forming a resistor in an integrated circuit is disclosed. The method includes forming a composite mask layer on a substrate, and forming a photoresist layer on the composite mask layer to define a trench area. Portions of the composite mask layer and the substrate are then removed using the photoresist layer as an etching mask, thereby forming a trench in the substrate. An isolation oxide layer is conformally formed on the composite mask layer, the sidewalls of the trench, and a bottom of the trench. Further, an undoped polysilicon layer is conformally formed on the isolation oxide layer. Thereafter, a doped polysilicon layer is formed over the undoped polysilicon layer, thereby filling the trench. The doped polysilicon layer is etched back using a first etchant, using the undoped polysilicon layer as an etch stop. The doped polysilicon layer and the undoped polysilicon layer are further etched back using a second etchant different from the first etchant, thereby forming a flat plug, where the second etchant has the same etch rate to both the undoped polysilicon layer and the doped polysilicon layer. Finally, the undoped polysilicon and the doped polysilicon layer are annealed to diffuse dopants of the doped polysilicon layer into the undoped polysilicon layer.

REFERENCES:
patent: 5316978 (1994-05-01), Boyd et al.
patent: 5420063 (1995-05-01), Maghsoudnia et al.
patent: 5462894 (1995-10-01), Spinner et al.

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