Patent
1992-07-29
1993-12-28
Shaw, Dale M.
G06F 1502
Patent
active
052747700
ABSTRACT:
A new controller transfers data directly between the register of an I/O port and an ALU register in an operation that takes only one phase of a two-phase clock cycle. A transfer between an ALU register and main memory is also performed in one phase, and the entire transfer can be accomplished in one clock cycle. A connection is also provided between the ALU registers and the flag register, and when the incoming byte is a status byte, the controller can transfer the byte to the flag register where it can control the next instruction execution.
REFERENCES:
patent: 3833888 (1974-09-01), Stafford
patent: 4845657 (1989-07-01), Yokota et al.
patent: 5025368 (1991-01-01), Watanabe
patent: 5079692 (1992-01-01), Takeda
patent: 5165033 (1992-11-01), Kawasaki et al.
patent: 5179668 (1993-01-01), Ejima et al.
Khim Yeoh Charles W.
Yue Ong David E.
Meky Moustafa M.
Robertson Wm. S.
Saile George O.
Shaw Dale M.
Tritech Microelectronics International Pte Ltd.
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