Defect tolerant power distribution network and method for integr

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257530, 257758, 257920, H01L 2702, H01L 2710, H01L 2348

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052742644

ABSTRACT:
Short circuits in the power distribution network of a circuit structure are accurately located and isolated by providing selected power distribution lines with areas whose width is reduced sufficiently to produce a highly resolved current-induced hot spot in response to a downstream short circuit. The invention is particularly applicable to crossovers of power distribution lines separated by an insulating layer. The upper line is divided into a plurality of spaced parallel channels in the crossover vicinity. The channels each include areas of further reduced width at their opposite ends, preferably outside of but proximate to the crossover area, where the hot spots are formed. A short circuit on any of the channels is isolated by cutting at the areas of further reduced width on either side of the fault. Terminal lines of the power distribution network can also be provided with areas of reduced width proximate to the global power distribution line from which they are supplied; these areas form a hot spot in response to a short circuit on the terminal line, and can be cut to isolate the terminal line. Low level faults can be detected with a high degree of resolution and very small space requirements.

REFERENCES:
patent: 4733372 (1988-03-01), Nanbu et al.
Leftwich et al., "The Infrared Microimager and Integrated Circuits", vol. 104, Multi Disciplinary Microscopy, 1977, SPIE, pp. 104-110 (Already of record).
Moore, "A Review of Fault-Tolerant Techniques for the Enhancement of Integrated Circuit Yield", IEEE Proc., vol. 74, No. 5, May 1986, pp. 684-698.
Fried, "An Analysis of Power and Clock Distribution for WSI Systems", Proc. Workshop on Wafer Scale Integration, 1986, pp. 127-142.
Raffel, "On the Use of Non-Volatile Programmable Links for Restructurable VLSI", Proc. Caltech Conf. on VLSI, 1979, pp. 95-104.
Chapman, "Laser Linking Technology for RVLSI", Proc. Workshop on Wafer Scale Integration, 1985, pp. 204-215.
Hiatt, "A Method of Detecting Hot Spots on Semiconductors Using Liquid Crystals", Proc. Reliability Physics Symposium, 19, 1981, pp. 130-133.

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