Transmission system via communications protected by an error man

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371 435, H03M 1312

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active

057455090

ABSTRACT:
A data transmission system wherein data to be transmitted is supplied to an encoding device (5) which comprises a data analysis circuit (35) for producing a parity code and an output circuit (32) for assigning the parity code to the input data so as to convert it into protected data for transmission. The data analysis circuit includes: (i) a serial-to-parallel converter (30) for converting the input data into "n" parallel data streams, the bits in each stream being at instants which are multiples of n.times.T, where T is the bit period of the input data; (ii) "n" cascade combinations of delay elements, each cascade delaying one of the "n" parallel-converted data streams by time periods which are multiples of n.times.T, each cascade having tapping points following certain ones of the delay elements therein; and (iii) combining circuits (GR1, GR2, OE) having inputs connected to tapping points of each of the cascade combinations and which derive the parity code.

REFERENCES:
patent: 3685016 (1972-08-01), Eachus
patent: 4119945 (1978-10-01), Lewis, Jr. et al.
patent: 4433415 (1984-02-01), Kojima
patent: 4796260 (1989-01-01), Schilling et al.
patent: 4849974 (1989-07-01), Schilling et al.
patent: 5570391 (1996-10-01), Lin et al.

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