Excavating
Patent
1995-10-11
1998-04-28
Beausoliel, Jr., Robert W.
Excavating
36518909, G01R 3128
Patent
active
057454990
ABSTRACT:
An integrated memory circuit is described which can be tested using both a burn-in test and an application specific test. The application specific test is initiated by providing a supervoltage on one of the integrated memory circuit external input pins. A reference voltage circuit is described for producing a variable or multi-level reference voltage used by a supervoltage detection circuit. If a burn-in test is being performed, the reference voltage is adjusted from a level used when the memory is not operating in a burn-in test mode. A multi-level reference voltage is provided to the supervoltage detection circuit, thereby, adjusting the supervoltage level needed to initiate an application specific test.
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Beausoliel, Jr. Robert W.
Iqbal Nadeem
Micro)n Technology, Inc.
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