Error detection apparatus for verifying binary coded constants

Details Error detection apparatus for verifying binary coded constants Error detection apparatus for verifying binary coded constants

1974-12-24

1976-02-10

Dildine, Jr., R. Stephen

Communications: electrical

Digital comparator systems

235153A, 360 31, H03K 1334, G11B 2736

Patent

active

039380840

ABSTRACT:
A peripheral subsystem includes error detection apparatus for verifying whether "speed constants" applied thereto have been decoded properly and contain legal codes. The detection apparatus includes binary to decimal decoder circuits which receive the binary coded speed constants and generate a predetermined output signal on one of a plurality of output terminals of the decoder circuits. A selected number of output terminals of the binary to decimal decoder circuits which are less than one half of the total output terminals are applied as inputs to an odd-even check circuit. When each of the constants are decoded without error and contain a legal code, the decoder circuits provide signals to the check circuit which produce a predetermined check signal to indicate that the constant has been decoded properly by the decoder circuits and contains a legal code.

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