Method for planarizing semiconductor structure using subminimum

Details Method for planarizing semiconductor structure using subminimum Method for planarizing semiconductor structure using subminimum

1992-09-04

1994-03-08

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 67, 437 78, 437 90, H01L 21465

Patent

active

052926893

ABSTRACT:
The invention provides a method for planarizing over a recessed area of a semiconductor structure. The method involves the creation of a series of subminimum (i.e. 50 to 500 Angstroms thick) silicon pillars extending vertically upward from the base of a wide trench, and oxidizing the pillars. When the substrate is covered with a conformal CVD oxide, the pillars prevent the formation of a single deep depression above the trench.

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