Fishing – trapping – and vermin destroying
Patent
1990-12-26
1993-04-20
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437162, 437909, 148DIG123, 148DIG10, H01L 21265
Patent
active
052042758
ABSTRACT:
A process for fabricating a compact bipolar transistor structure is disclosed which eliminates the need for a field oxide isolation region between the collector contact region and emitter of the transistor. An island of non-monocrystalline silicon is formed on top of the transistor structure partially covering the base and collector contact regions. Ribbons of non-insulating material are formed along the sidewalls of the island. The ribbon over the base region is employed to form a narrow emitter region with an annealing step that drives dopant from the ribbon or island into the portion of the base region below the ribbon. An insulating layer is disposed between the transistor structure and the island and ribbon over the collector contact region to insulate the emitter from the collector. Insulating sidewall spacers are formed next to the sidewall ribbons to insulate silicide regions grown over the base region, island and collector contact region for the three transistor contacts.
REFERENCES:
patent: 4641170 (1987-02-01), Ogura et al.
patent: 4678537 (1987-07-01), Ohuchi
patent: 4712125 (1987-12-01), Bhatia et al.
patent: 4722908 (1988-02-01), Burton
patent: 4722909 (1988-02-01), Burton
patent: 4889823 (1989-12-01), Bertagnolli et al.
Hearn Brian E.
Nguyen Tuan
North American Philips Corp.
Schreiber David
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