Parallel and scalable method for identifying valid instructions

Details Parallel and scalable method for identifying valid instructions Parallel and scalable method for identifying valid instructions

1997-01-08

1999-01-12

DeCady, Albert

395391, 39580022, 39580024, 39518501, G06F 1500

Patent

active

058599916

ABSTRACT:
A superscalar microprocessor employing an instruction scanning unit is disclosed. The instruction scanning unit processes start and end byte information associated with a plurality of contiguous instruction bytes. The processing of start byte information and end byte information is performed independently and in parallel, and the instruction scanning unit produces a plurality of scan values which identify valid instructions within the plurality of contiguous instruction bytes. Additionally, the instruction scanning unit is scalable. Multiple instruction scanning units may be operated in parallel to process a larger plurality of contiguous instruction bytes. Furthermore, the instruction scanning unit detects certain error conditions. Error information may be used by external logic to determine the proper course of action in light of the detected error.

REFERENCES:
patent: 4037213 (1977-07-01), Atkins et al.
patent: 4044338 (1977-08-01), Wolf
patent: 4453212 (1984-06-01), Gaither et al.
patent: 4807115 (1989-02-01), Torng
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5129067 (1992-07-01), Johnson
patent: 5185868 (1993-02-01), Tran
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5226130 (1993-07-01), Favor et al.
patent: 5233694 (1993-08-01), Hotta et al.
patent: 5233696 (1993-08-01), Suzuki
patent: 5471628 (1995-11-01), Phillips et al.
Intel, "Chapter 2: Microprocessor Architecture Overview," pp. 2-1 through 2-4.
Michael Slater, "AMD's K5 Designed to Outrun Pentium," Microprocessor Report, vol. 8, No. 14, Oct. 24, 1994, 7 pages.
Sebastian Rupley and John Clyman, "P6: The Next Step?," PC Magazine, Sep. 12, 1995, 16 pages.
Tom R. Halfhill, "AMD K6 Takes On Intel P6," Byte, Jan. 1996, 4 pages.

Affiliated with

Also associated with

Rating

Parallel and scalable method for identifying valid instructions does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallel and scalable method for identifying valid instructions , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel and scalable method for identifying valid instructions will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1524056