Method and apparatus for the design of a circuit

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364490, G06F 1900

Patent

active

058597760

ABSTRACT:
In automated design, a useful insertion of a delay buffer or an increase in the delay time of the critical path could not been prevented. When inserting a logic element between two certain points on the circuit, substitution of other paths passing through the relevant insertion position is considered and the insertion position of the logic element is determined finally.

REFERENCES:
patent: 5410491 (1995-04-01), Minami
patent: 5416718 (1995-05-01), Yamazaki
patent: 5557531 (1996-09-01), Rostoker et al.
patent: 5618744 (1997-04-01), Suzuki et al.
patent: 5638291 (1997-06-01), Li et al.
patent: 5638294 (1997-06-01), Sasada
patent: 5663889 (1997-09-01), Wakita
patent: 5693540 (1997-12-01), Turner et al.

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