Method of bonding IC component to flat panel display

Details Method of bonding IC component to flat panel display Method of bonding IC component to flat panel display

1996-03-22

1999-01-12

Niebling, John

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Optical characteristic sensed

438 15, 438118, 438119, H01L 2100

Patent

active

058588060

ABSTRACT:
A method wherein an IC component is mounted to electrodes provided in a transparent portion of a flat panel display with interposition of an anisotropic conductive adhesive or film, includes steps of detecting, when mounting the IC component onto the transparent portion of the flat panel display for temporary bonding to the adhesive or film, positional displacement amounts of first positional alignment portions in two positions of the mounted IC component relative to second positional alignment portions in two positions of the transparent portion of the flat panel display in correspondence with the first positional alignment portions by a camera from a side of the flat panel display opposite from a side on which the IC component is mounted, thereby inspecting positional alignment state of bumps of the IC component with the electrodes of the flat panel display, feeding back the positional displacement amount of the IC component with respect to the flat panel display when the positional alignment state is not acceptable, and performing positional alignment of bumps of a next IC component with the electrodes of the flat panel display while taking the fed-back positional displacement amount into account. A state of bonding of the bumps to the electrodes of the flat panel display is detected in a plurality of portions, it is decided that a parallelism of the IC component relative to the flat panel display exceeds a tolerance range when the state of bonding is not acceptable, and then a warning signal is outputted.

REFERENCES:
patent: 4984887 (1991-01-01), Yoshioka

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