Electrostatic discharge protection for semiconductor input devic

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357 38, 357 41, 357 13, H01L 2906, H01L 2978, H01L 2974, H01L 2702

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active

050775910

ABSTRACT:
A method and structure for protecting an integrated circuit from electrostatic discharges are disclosed. A Shockley diode (22) is connected to an input bond pad (12) and to a MOSFET transistor (17) which is desired to be protected. The normally high breakdown voltage required to drive the Shockley diode (22) into conduction is reduced by providing a trigger transistor (24) for prematurely triggering the diode (22). When the base-collector junction of the common emitter configured trigger transistor (24) is driven into avalanche breakdown by the electrostatic discharge, charged carriers (60) are generated, and attracted by the Shockley diode (22). The base (54) of the trigger transistor (24) is biased during normal operations iwth a supply voltage, and during electrostatic discharges to a higher voltage by an inherent Zener diode (64). When normal power is applied to the integrated circuit (10), input latch-up immunity is enhanced, and when an electrostatic discharge appears at the input bond pad (12), the electrostatic discharge protection is enhanced.

REFERENCES:
patent: 4400711 (1983-08-01), Avery
patent: 4484244 (1984-11-01), Avery
patent: 4626882 (1986-12-01), Cottrell et al.
patent: 4633283 (1986-12-01), Avery
patent: 4757363 (1988-07-01), Bohm et al.

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