Office environment level electrostatic discharge protection

Details Office environment level electrostatic discharge protection Office environment level electrostatic discharge protection

1995-02-13

1996-07-02

Fleming, Fritz M.

Electricity: electrical systems and devices

Discharging or preventing accumulation of electric charge

361 56, 361118, 361220, H02H 322

Patent

active

055329012

ABSTRACT:
An electrostatic discharge protection device for a connector associated with an integrated circuit chip, particularly one associated with a thermal ink-jet printhead. AMOS field effect device extends along at least one edge of the connector on the chip. A bipolar transistor, parasitic to the field effect device, conducts current from the connector to ground in response to a voltage between the connector and ground in excess of a predetermined threshold. A zone of a predetermined electrical resistance is operatively disposed between the bipolar transistor and ground. The zone may substantially encircle the bonding pad of the connector to evenly distribute local incidences of high voltage. The invention enables integrated circuits to pass ESD requirements of office products, which is 15 kV by Human Body Model testing.

REFERENCES:
patent: 4990984 (1991-02-01), Misu
patent: 5010355 (1991-04-01), Hawkins et al.
patent: 5122618 (1993-05-01), O'Neill et al.
patent: 5428498 (1995-06-01), Hawkins et al.
IBM Technical Disclosure Bulletin, vol. 18, No. 2, Jul. 1975, Lateral Transistors as Active Guard Ring in FET Circuits, Clemen et al.

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