Parallel processing type processor system with trap and stall co

Details Parallel processing type processor system with trap and stall co Parallel processing type processor system with trap and stall co

1994-08-16

1996-10-01

Lall, Parshotam S.

Boots, shoes, and leggings

395733, 364DIG1, G06F 946

Patent

active

055617743

ABSTRACT:
A parallel processing type processor system with trap and stall control functions capable of operating without increasing the cycle time, such that the lowering of the clock frequency in the system can be prevented. In the system, the processor units are controlled such that when an exception is caused in an execution of at least one of the instructions supplied to the processor units concurrently, the processings of all of the instructions supplied to the processor units concurrently are aborted. In addition, the processings of the instructions supplied to the processor units concurrently are stalled when it is not possible to deny a possibility for an occurrence of an exception in the execution of the instructions supplied to the processor units concurrently.

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"Organization of the Motorola 88110 Super Scalar RISC Processor" Dieffendorff et al, IEEE, Apr. 1992, pp. 40-63.

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