Microprocessor with instruction-cycle versus clock-frequency mod

Details Microprocessor with instruction-cycle versus clock-frequency mod Microprocessor with instruction-cycle versus clock-frequency mod

1994-12-09

1997-07-15

Heckler, Thomas M.

395376, G06F 108, G06F 930

Patent

active

056491743

ABSTRACT:
A microprocessor provides for a single-cycle and a dual-cycle instruction mode. In the single-cycle mode, certain instructions, e.g., a "shift plus add" instruction, are performed in a single cycle with a relatively low clock rate. In the dual-cycle mode, the shift is performed in the first cycle and the add is performed in the second cycle with a relatively high clock rate. In the dual-cycle mode, a cycle can be dropped if the shift amount is zero or one of the operands is zero. A system designer and/or a programmer can select the mode to maximize throughput.

REFERENCES:
patent: 3656123 (1972-04-01), Carnevale et al.
patent: 4128880 (1978-12-01), Cray, Jr.
patent: 4365311 (1982-12-01), Fukunaga et al.
patent: 5269007 (1993-12-01), Hanawa et al.

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