Multiprocessor system for locally managing address translation t

Details Multiprocessor system for locally managing address translation t Multiprocessor system for locally managing address translation t

1995-06-30

1997-07-15

Swann, Tod R.

395419, G06F 1210

Patent

active

056491417

ABSTRACT:
An address translation technique used in a multiprocessor system is disclosed. In a multiprocessor system for connecting a plurality of clusters with each other via a network, each of these clusters is arranged by comprising a plurality of processors; a cluster translator for translating a cluster number; a cluster translation table for storing therein a correspondence relationship between a logical cluster number and a physical cluster number; an address translator for translating an address; and an address translation table for storing therein a correspondence relationship between a logical address and a physical address. The address translation table stores only the data corresponding to a memory employed in the cluster. Accordingly, a total storage capacity of the address translation tables is reduced, and an updating operation of the address translation tables is simplified. Furthermore, the address translation table is exclusively identified based on a local job number and the cluster number, so that operation to update the address translation table is simplified.

REFERENCES:
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Association for Computing Machinery, "Memory Coherence in Shared Virtual Memory Systems", vol. 7, No. 4, pp. 321-359, Nov. 1989.
Computer Networks, Andrew Tanenbaum, ISBN 0-13-165183-8, 1981.

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