Digital decimation filter

Details Digital decimation filter Digital decimation filter

1988-07-25

1990-01-09

Harkcom, Gary V.

Boots, shoes, and leggings

36472416, G06F 1531

Patent

active

048932647

ABSTRACT:
A digital decimation filter which includes a multiplexer which receives signal values x.sub.i at a sampling rate of 1/T and where output signals which have half the sampling rate are supplied to two outputs. Separate bit associated circuits BP1 and BP2 are connected to the outputs for each significant figure of the p-place binary filter coefficients c6 through c1 and each of the bit associated circuits include partial products stages Mc6.sub.0 . . . Mc1.sub.0, Mc6.sub.1 . . . Mc1.sub.1 for all of the filter coefficient bits and the bit associated circuits also contain adder-register iterative circuits including delay elements and the output of the iterative circuit of the most significant bit plane BP2 is the output of the filter.

REFERENCES:
patent: 4323980 (1982-04-01), Houdard et al.
patent: 4344149 (1982-08-01), van de Meeberg et al.
patent: 4584659 (1986-04-01), Stikvoort
Crochiere et al, "Optimum FIR Digital Filter Implementations for Decimation, Interpolation and Narrow-Band Filtering", IEEE Trans. on Acoustics, Speech and Signal Processing, vol. ASSP-23, No. 5, Oct. 1975, pp. 444-456.

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