Memory access method using intermediate addresses

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Details

395417, 395478, G06F 1318, G06F 1210

Patent

active

057271798

ABSTRACT:
In an access method, with which a first processor in a first processor unit can access a memory in a second processor unit in a multi-processor system, a virtual address generated by the first processor is translated into an intermediate address common to the system. The generated intermediate address is output onto a system bus, and is fetched by the second processor unit. The fetched intermediate address is translated into a real address in the second processor. The memory is accessed using the translated real address.

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patent: 4928224 (1990-05-01), Zulian
patent: 5117350 (1992-05-01), Parrish et al.
patent: 5170465 (1992-12-01), McKeeman et al.
patent: 5179703 (1993-01-01), Evans

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