Integrated capacitor disposed over damaged crystal area

Wave transmission lines and networks – Automatically controlled systems – With control of equalizer and/or delay network

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357 68, 357 30, 333246, 333247, H01L 2702, H01L 2944, H01P 100

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active

050973150

ABSTRACT:
According to this invention, a circuit element is formed on an upper surface of a semiconductor substrate having a predetermined region where a crystal structure is destroyed, and a conductive pattern is formed on a back surface of the semiconductor substrate located under the predetermined region. Therefore, almost no change in charge occurs in the circuit element and the conductive pattern formed to sandwich the predetermined region where the crystal structure is destroyed. Even if a chip carrier type light-receiving element is used to reduce a ground-capacitance generated in the light-receiving element, the ground-capacitance cannot be sufficiently reduced. For this reason, according to this invention, the first conductive pattern set at a reference potential and a second conductive pattern which is electrically isolated from the first conductive pattern and is applied with a reception signal voltage are formed on a back surface of a circuit board, and a circuit element is mounted on an upper surface of the circuit board located above the second conductive pattern. Therefore, a change in voltage occurring in the circuit element is almost equal to a change in voltage in the second conductive pattern formed on the back surface of the circuit board, resulting in almost no ground-capacitance is generated.

REFERENCES:
patent: 3416042 (1968-12-01), Thomas et al.
patent: 4577213 (1986-03-01), Bauhahn
patent: 4783697 (1988-11-01), Benenati et al.

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