Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1977-11-01

1980-04-22

Edlow, Martin H.

357 41, 357 55, 357 14, H01L 2978

Patent

active

041997727

ABSTRACT:
A semiconductor memory device in which a plurality of unit memory cells are formed on a semiconductor substrate; each memory cell comprises a main electrode region provided with either of the source and drain sections of an MOS transistor, a gate region and an MOS capacitor region, the main electrode region, gate region and capacitor region being arranged in the order mentioned; a recess is formed in a semiconductor region including the gate region and part of the MOS capacitor region; the gate region is formed in one selected portion of the recess-defining wall body; and part of the capacitor electrode of the capacitor region extends over another selected portion of the recess-defining wall body.

REFERENCES:
patent: 3825945 (1974-07-01), Masouka
patent: 3893155 (1975-07-01), Ogiue
patent: 3975221 (1976-08-01), Rodgers
patent: 4003036 (1977-01-01), Jenne
patent: 4012757 (1977-03-01), Koo
patent: 4017883 (1977-04-01), Ho
patent: 4084175 (1978-04-01), Ouyang

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