Semiconductor memory device having ECC circuit for decreasing th

Details Semiconductor memory device having ECC circuit for decreasing th Semiconductor memory device having ECC circuit for decreasing th

1993-02-03

1995-01-24

Nguyen, Hoa T.

Excavating

G06F 1110

Patent

active

053847890

ABSTRACT:
A semiconductor memory device has a cell and amplifier portion, a syndrome generation circuit, an error checking and correction circuit, and a plurality of memory control blocks. The cell and amplifier portion has a memory cell array, a sense amplifier array, and a column gate array, and each of the memory control blocks has a data bus amplifier, a write amplifier, and a syndrome decoder circuit which decodes syndrome output from the syndrome generation circuit. Consequently, an occupancy area can be reduced by decreasing the number of wiring lines, and a large scale integration and a low power consumption can be realized.

REFERENCES:
patent: 4903268 (1990-02-01), Hidaka et al.
patent: 5012472 (1991-04-01), Arimoto et al.
patent: 5056089 (1991-10-01), Furuta et al.
patent: 5233610 (1993-08-01), Nakayama et al.

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