Sharing of register stack by two execution units in a central pr

Details Sharing of register stack by two execution units in a central pr Sharing of register stack by two execution units in a central pr

Filed on

1994-09-26

Date issued

1996-04-09

Examiner

Bowler, Alyssa H.

Patent Class

Boots, shoes, and leggings

Other Related Categories

364736, 3642328, 364258, 364DIG1, G06F 900, G06F 9302

Type

Patent

Status

active

Patent number

055070000

Description

ABSTRACT:
In a central processor incorporating at least one co-processor, such as a floating point arithmetic co-processor, in addition to a basic arithmetic logic unit, the problem of rationalizing the contents of the accumulator and supplementary accumulator registers without the burden of speed penalties is addressed and solved. This is achieved by providing input/output access to a common register file and by switching control of the register file to the proper processing unit appropriately. A single, shared accumulator register and a single, shared supplementary accumulator register are included in the stack along with other sharable registers such as address modification registers. Thus, the contents of the accumulator register and the supplementary accumulator register are always up-to-date and available to all processing units in the central processor without the need for first carrying out rationalization steps.

REFERENCES:
patent: 4396979 (1983-08-01), Mor et al.
patent: 4777594 (1988-10-01), Jones et al.
patent: 4872131 (1989-10-01), Kubota et al.
patent: 5072418 (1991-12-01), Boutaud et al.
patent: 5204828 (1993-05-01), Kohn
patent: 5272660 (1993-12-01), Rossbach

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