Multi-layer wiring structure having varying-sized cutouts

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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257750, 257758, 257773, H01L 23528

Patent

active

057604290

ABSTRACT:
An integrated circuit having a multi-layered metal wiring structure with interlayer insulating films therebetween. A small cutout is made in a metal wiring when it is desirous to have the metal wiring touch a contact formed in a through hole passing through said cutout. A larger cutout is made in a metal wiring when it is desirous to have the metal wiring remain spaced from a contact formed in a through hole passing through said cutout.

REFERENCES:
patent: 3323198 (1967-06-01), Shortes
patent: 4840923 (1989-06-01), Flagello et al.
patent: 4872050 (1989-10-01), Okamoto et al.
patent: 4902637 (1990-02-01), Kondou et al.
patent: 5025299 (1991-06-01), Arnould
patent: 5262352 (1993-11-01), Woo et al.

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