1984-07-30
1987-11-17
Edlow, Martin H.
357 40, 357 236, H01L 2710
Patent
active
047077182
ABSTRACT:
A read-only memory which features a high operation speed and a high degree of integration. A first layer works as ground lines and word lines, and a second layer works as data lines. The word lines and the data lines are arranged linearly to reduce parasitic capacitance and parasitic resistance, and hence to achieve high-speed operation. The invention is adapted where data of large quantities are to be treated, without effecting the rewriting.
REFERENCES:
patent: 4298962 (1981-11-01), Hamano et al.
patent: 4384345 (1983-05-01), Mikome
Nagai Ryo
Nakamura Hideo
Noguchi Kouki
Sakai Yoshio
Yamamoto Shuichi
Edlow Martin H.
Hitachi , Ltd.
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