Microprocessor stack built-in guards

Details Microprocessor stack built-in guards Microprocessor stack built-in guards

1989-11-16

1993-06-22

Fleming, Michael R.

Excavating

371 12, 395575, 364DIG1, 3642477, 364265, 3642656, 3642674, G06F 1128

Patent

active

052222209

ABSTRACT:
The present invention is a method for a microprocessor such that when a call is made to a subroutine or an interrupt, a return address is stored in a "stack" memory (RAM) and also that a particular piece of hardware write the return address to an additional register (latches) within the microprocessor. The method enables a comparison to be made at the end of the subroutine or interrupt such that the address to which the subroutine tries to return is compared to the address as latched into the hardware portion of the microprocessor to detect whether any human error has occurred in the programming of the interrupt program or the subroutine.

REFERENCES:
patent: 4398244 (1983-08-01), Chu et al.
patent: 4410938 (1983-10-01), Higashiyama
patent: 4571677 (1986-02-01), Hirayama et al.
patent: 4656604 (1987-04-01), Van Loon
patent: 4812967 (1989-03-01), Hirosawa et al.
patent: 4881228 (1989-11-01), Shouda
patent: 4920538 (1990-04-01), Chan et al.
patent: 5058052 (1991-10-01), Sexton et al.

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