Precharged discharge sensing for EPROM

Details Precharged discharge sensing for EPROM Precharged discharge sensing for EPROM

1982-04-05

1985-10-01

Fears, Terrell W.

Static information storage and retrieval

Addressing

364200, 365189, 365203, 365226, G11C 1140

Patent

active

045450382

ABSTRACT:
An electrically programmable read-only memory including a memory array of several bits capable of storing binary data connected to an address circuit for accepting a plurality of bits that designate a selected set of the memory array bits and further connected to a data latch to store data to be programmed in a selected set of memory bits. Further provided is a high voltage circuit for providing a high voltage to the selected set of bits according to the data in the data latch and for programming the data in the selected set of memory array bits. Further provided is an output circuit to provide a precharge signal to the memory array bits and to output data programmed in a selected set of memory array bits designated by the address circuit.

REFERENCES:
patent: 4094012 (1978-06-01), Perlegos et al.
patent: 4393481 (1983-07-01), Owen et al.
Hanafi, "Bit Line Discharge Circuit for NAND Logic Read-Only Storage Arrays", IBM Tech. Disc. Bul., vol. 23, No. 7B, 12/80, pp. 3181-3182.
Owen et al., "Voltage Generator for EPROMS", Electronic Product Design, 10/81, p. 28, 52007 0037.

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