Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1990-08-13
1993-06-22
Sniezek, Andrew L.
Static information storage and retrieval
Addressing
Plural blocks or banks
365239, 36523006, 365233, G11C 800
Patent
active
052220478
ABSTRACT:
In a block access memory in which the memory cell array is divided into a plurality of blocks and data input/output is carried out by block unit, each block is divided into a plurality of subblocks, and the timing of activating the word line and the timing of activating the sense amplifier are made different for each subblock in the block in which the selected word line is included, whereby the peak current associated with the bit line charge/discharge at the time of activating the sense amplifiers is reduced.
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IEEE J. of Sol. St. Circuits: "A High Speed Dual Port Memory with Simultaneous Serial and Random Mode Access for Video Applications", by Raymond Pinkham et al., vol. SC-19, No. 6, Dec. 1984, pp. 999-1007.
Fujishima Kazuyasu
Hidaka Hideto
Matsuda Yoshio
Mitsubishi Denki & Kabushiki Kaisha
Sniezek Andrew L.
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